Reduced instruction set computing

Results: 261



#Item
21X86 / Reduced instruction set computing / Motorola 68000 family / PA-RISC / Instruction set / Itanium / ARM architecture / Endianness / DEC Alpha / Computer architecture / Instruction set architectures / Very long instruction word

Optimizing for Size: Exploring the Limits of Code Density Vincent M. Weaver ASPLOS XIV Poster Session, 8 MarchAbstract

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Source URL: web.eece.maine.edu

Language: English - Date: 2009-03-04 12:37:03
22Central processing unit / Classes of computers / Parallel computing / Models of computation / Hazard / Superscalar / Instruction set / Register renaming / Reduced instruction set computing / Computer architecture / Computing / Computer engineering

The finite state automaton based pipeline hazard recognizer and instruction scheduler in GCC Vladimir N. Makarov Red Hat

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Source URL: gcc.cybermirror.org

Language: English - Date: 2004-08-29 18:00:00
23Instruction set architectures / Central processing unit / Stack machine / Microcontrollers / Instruction set / MIPS architecture / Reduced instruction set computing / MicroBlaze / Forth / Computer architecture / Computing / Computer hardware

J1: a small Forth CPU Core for FPGAs James Bowman Willow Garage Menlo Park, CA

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Source URL: excamera.com

Language: English - Date: 2010-11-21 15:20:10
24Classes of computers / Parallel computing / Scoreboarding / Hazard / Tomasulo algorithm / Central processing unit / Superscalar / Reduced instruction set computing / Instruction set / Computer architecture / Computing / Computer engineering

EN164: Design of Computing Systems Lecture 22: Processor / ILP 3 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering

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Source URL: scale.engin.brown.edu

Language: English - Date: 2014-03-23 13:27:00
25Classes of computers / ARM architecture / Central processing unit / Instruction set architectures / Instruction set / ARM9 / Reduced instruction set computing / Complex instruction set computing / Addressing mode / Computer architecture / Computing / Computer hardware

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Source URL: media.wiley.com

Language: English - Date: 2014-02-20 10:18:36
26Electronics / Advanced Micro Devices / Microprocessor / Intel / Integrated circuit / Bit slicing / 9 / Reduced instruction set computing / Computer hardware / Electronic engineering / Digital electronics

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Source URL: archive.computerhistory.org

Language: English - Date: 2009-07-13 12:01:26
27Reduced instruction set computing / Johannes Kepler / Parallel computing / Computing / Computer science / Austria / European people / Bruno Buchberger / Germany / Research Institute for Symbolic Computation / Hagenberg im Mühlkreis / Linz

Curriculum Vitae Wolfgang Schreiner A.Univ.-Prof. Dipl.-Ing. Dr. Wolfgang Schreiner Office address: Research Institute for Symbolic Computation (RISC)

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Source URL: www.risc.jku.at

Language: English - Date: 2015-04-21 02:40:32
28Committee / Politics / Social psychology / Structure / Parliamentary procedure / Quorum / Reduced instruction set computing

RADIATION INSTRUMENTATION TECHNICAL COMMITTEE CONSTITUTION AND BYLAWS RITC CONSTITUTION ARTICLE I - NAME AND OBJECTIVE

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Source URL: ieee-npss.org

Language: English - Date: 2014-09-22 09:43:59
29Instruction set architectures / Central processing unit / DEC Alpha / CPU design / Microprocessor / Reduced instruction set computing / Computer architecture / Computer hardware / Electronic engineering

Freedom CPU Project F-CPU Design Team Draft and Request For Comment F-CPU MANUAL REV. 0.2.7c

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Source URL: f-cpu.seul.org

Language: English - Date: 2002-11-16 10:57:05
30Instruction set architectures / Central processing unit / DEC Alpha / CPU design / Microprocessor / Reduced instruction set computing / Computer architecture / Computer hardware / Electronic engineering

Freedom CPU Project F-CPU Design Team Draft and Request For Comment F-CPU MANUAL REV. 0.2.7c

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Source URL: f-cpu.seul.org

Language: English - Date: 2002-11-16 10:50:45
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